Hindawi Publishing Corporation
EURASIP Journal on Wireless Communications and Networking
Volume 2010, Article ID 979120, 9 pages
doi:10.1155/2010/979120
Research Article
Modified Polar Sigma-Delta Transmitter for
Multiradio Applications
Martha Liliana Suarez Penaloza,
1
V
´
aclav Valenta,
1, 2
Genevi
`
eve Baudoin,
1
Martine Villegas,
1
and Roman Mar
ˇ
s
´
alek
2
1
Universit
´
e Paris-Est, ESYCOM, ESIEE Paris, 93160, Noisy-le-Grand, France
2
Department of Radio Electronics, Brno University of Technology, 61200, Brno, Czech Republic

best performance for each mode, but on the other hand,
it significantly penalizes the overall complexity, power con-
sumption, and implementation costs. Therefore, a multi-
radio transceiver that combines low power and low costs
by sharing reconfigurable components and that is capable
of generating any arbitrary waveform becomes the ulti-
mate goal. This concept is known as a multi-radio trans-
ceiver.
A multi-radio transmitter should be able to support
the most diffused wireless communication standards in
the radio band of 800 MHz to 6 GHz and be able to
adapt its operating parameters to required specifications
[1]. It has to cope with variable signal dynamics, which
in turn requires high linearity and low-noise performance
of the whole transmission chain. Moreover, a multi-radio
transmitter has to support variety of different frequency
bands and wide range of different channel bandwidths.
Furthermore, a cognitive multi-radio is an evolution of the
multi-radio concept that is capable of performing efficient
environment spectrum scanning. It can adapt to conditions
of the environment and user’s needs by choosing the most
appropriate communication standard.
The polar ΣΔ transmitter may be used for multi-radio
applications when the RF elements of the architecture are
designed for the most restrictive parameters of a given
communication standard, as suggested in [1].
2 EURASIP Journal on Wireless Communications and Networking
The overall architecture of the polar ΣΔ transmitter is
giveninSection2. Suggested modifications are presented and
analysed afterwards. Mobile WiMAX standard and related

envelope signal).
Polar architectures decompose the high PAPR signal into
two components: a constant envelope phase signal and a
variable envelope signal. The complex envelope z(t)ofa
baseband-modulated signal (QPSK, m-QAM, OFDM, etc.)
can be expressed as
z
(
t
)
= z
I
(
t
)
+ jz
Q
(
t
)
. (1)
The resulting envelope ρ and both phase signals cos(φ)and
sin(φ) are separated, mathematically:
ρ
(
t
)
=

(

,sin

φ

=
z
Q
(
t
)
ρ
(
t
)
. (3)
The purpose of the decomposition is to amplify the con-
stant envelope signal in a high-efficiency nonlinear switched
mode RF PA (that offers theoretically 100% efficiency as the
current and the voltage arises at different time intervals) and,
moreover, to avoid AM/AM and AM/PM distortions [4, 5].
ρ
ΣΔ
(digital)
cos (φ)
sin φ
Digital
DACDAC
PLL
+
−

synchronization becomes easier compared to the RF polar
ΣΔ transmitter [6].
Delay mismatch between the envelope and phase signals
is not as severe issue as in the classical Envelope Elimination
and Restoration (EER) architecture [1]. However, one of the
challenges of this architecture (as any polar architecture)
comes out from the conversion from Cartesian to Polar
coordinates. This conversion leads to bandwidth expansion
and, therefore, to higher requirements on the sampling rate.
In the polar architecture proposed in [7], the output sig-
nal of the ΣΔ modulator as well as the z
I
(t) and the z
Q
(t)sig-
nals (ρ cos(φ)andρ sin(φ)) are digital. Therefore, as shown
in Figure 1, two Digital-to-Analog Converters (DACs) need
to be employed before the upconversion stage. The sampling
frequency of DACs is chosen according to the ΣΔ frequency
and it has to be high enough to avoid undesired overlapping
of the ΣΔ quantization noise [9]. Communication standards
in our multi-radio concept require high ΣΔ frequencies and
therefore significant sampling frequency for DACs.
EURASIP Journal on Wireless Communications and Networking 3
Envelope
detector
ΣΔ
RF
input
τ

Figure 3: Architecture of the modified polar ΣΔ transmitter.
From this point onward, the polar ΣΔ architecture
notation will refer to the architecture proposed in [7].
2.1. Modified Polar ΣΔ Architecture. Instead of decomposing
the complex envelope signal into ρ(t), sin(φ), and cos(φ)
as suggested in [7], the modified architecture depicted in
Figure 3 separates the envelope and phase signals into ρ(t)
and φ(t) and processes them independently. Digital phase
signal is converted to analog and then modulated to the
carrier frequency f
c
. Finally, the constant envelope signal
and the phase signal are recombined. The advantage com-
pared to [7] is that only one DAC is required. Furthermore,
DAC frequency requirements can be relaxed. Independent
processing of ρ(t)andφ(t) is also suggested in [6]; however,
this approach does not consider issues related to DAC
conversion and issues regarding the appropriate choice of
DAC and ΣΔ sampling frequencies. The latter issues are
analyzed hereafter in detail.
The polar ΣΔ architecture proposed in [7] upconverts the
baseband signal to the carrier frequency through an analog
IQ modulator. Similarly, the modified ΣΔ architecture we
propose here employs an analog multiplier to recombine
the envelope and phase signals. The next section suggests
generating a digital carrier and replacing the analog mixer
by a digital mixer.
2.2. Polar ΣΔ Architecture with Digital Mixing. Figure 4
presents a scheme of the digital mixing polar ΣΔ architecture.
In this case, an All Digital PLL (ADPLL) generates the carrier

Architecture: Mobile WiMAX Validation
Mobile WiMAX is a very flexible wireless communication
standard, which offers a choice among a range of different
channel bandwidths that vary depending on the expected
throughput and the allocated radio frequency band. The
channel bandwidth may vary from 1.75 MHz to 20 MHz.
The multi-radio architecture must support any of the
configurations defined by the standard. This communication
standard has been chosen in our simulations due to high
envelope dynamics, relatively high channel bandwidths and
very high requirements for the frequency synthesizer (in
terms of integrated phase noise, frequency range, and settling
time). The Mobile WiMAX operates at higher frequencies
than any other cellular systems, and, hence, this fact draws
the attention to the influence of the carrier frequency on the
performance of the polar ΣΔ architecture.
3.1. Mobile WiMAX Technology. Mobile WiMAX standard
supports mapping according to the QPSK, 16-QAM, or 64
QAM constellation schemes using the Orthogonal Frequency
Division Multiplexing (OFDM) modulation. OFDMA air
interface is based on the OFDM modulation and corresponds
to the nonline of sight operation in licensed frequency bands
below 11 GHz. The FFT size can vary between 2048, 1024,
512, and 128 [11]. Following parameters characterise the
OFDMA: channel bandwidth BW, number of used subcar-
riers N
used
and DC subcarriers, sampling factor n, and the
cyclic prefix to useful time ratio G [11]. Channel bandwidths
and the number of subcarriers are chosen depending on

10 1024
3300–3400
5 512
7,10 1024
3400–3800 5 512
3400–3600
3600–3800 7,10 1024
specify the frequency range, channel bandwidth, and the FFT
size [12]. All these profiles use the TDD duplexing mode.
3.2. Simulation Parameters. Following simulations have been
conducted using Agilent Advanced Design Software (ADS)
and the Matlab simulation tool.
Simulation parameters have been chosen according to
the WiMAX Forum certification profiles (Table 1) as follows:
carrier frequency
= 3.7 GHz, BW = 10 MHz, FFT size 1024,
n
= 28/25, and G = 1/32 (throughput privileged) [12].
Raw symbol rate is calculated as specified by [11] using the
selected parameters and the 64-QAM modulation scheme
(this configuration has been selected to observe the highest
PAPR). It is necessary to choose enough samples per symbol
in order to respect the emission power mask, which is
defined in Europe by [13]. Moreover, number of samples
also determines the ΣΔ frequency (symbol rate/number of
samples).
The ΣΔ modulator has been synthesized using the Matlab
Delta-Sigma Toolbox [15]. A model of a 1-bit Σ  is shown
in Figure 5. The output signal V(z)isgivenby
V

is the Signal Transfer Function (STF), and it corresponds
to a low-pass filter. The second term represents the Noise
Transfer Function (NTF), and it corresponds to a high-pass
filter. NTF can be synthesized using the Matlab toolbox from
the following arguments: the order of the NTF, the out-of-
band gain of the noise transfer function, the centre frequency
of the modulator, and the Oversampling Ratio (OSR). The
modulator order is proportionally related to noise-shaping
performance and SNR improvement, but on the other hand,
low-order ΣΔ modulators are less sensitive to limit cycles,
easier to implement, and offer higher stability [15].
A second-order modulator has been chosen for simula-
tions. Since Lee’s rule states that a gain minor to 2 yields a
U(z)
+
−
H(z)
E(z)
+
V(z)
Figure 5: Model of a 1-bit ΣΔ modulator.
stable modulator with a binary quantizer [15], the out-of-
band gain has been set to 1.9. Finally, due to the low-pass
nature of the modulator, the centre frequency has been set to
0.
The OSR is related to the ΣΔ modulator sampling
frequency f
ΣΔ
and to the input signal bandwidth f
B

volution with the carrier. During this modulation process,
the out-of-band quantization noise is modulated as well and
reaches the maximum value at every unpaired multiples of
the f
ΣΔ
/2 ( f
ΣΔ
/2, 3 f
ΣΔ
/2, 5 f
ΣΔ
/2, etc.) while the minimum
value of the quantization noise appears at every multiple of
f
ΣΔ
( f
ΣΔ
,2f
ΣΔ
,3f
ΣΔ
, etc.). This frequency transposition is
depicted in Figure 6.
If the f
ΣΔ
is superior to 2 f
c
, the signal in the useful
bandwidth will be disturbed by the quantification noise at
the multiples of the f

/20 f
ΣΔ
/2 f
ΣΔ
−3
·
f
ΣΔ
/2Frequency
(a)
LO output spectrum : OL( f )
−f
c
0 f
c
Frequency
(b)
Resulting modulated signal = X( f )
∗
OL( f )
−f
c
0 f
c
Frequency
(c)
Figure 6: Modulation of the envelope ΣΔ coded signal.
−60
−50
−40

4. Frequency Synthesizer
In the previous sections, an ideal frequency synthesizer has
been considered. This section investigates the impact of a real
frequency synthesizer on the performance of the previously
presented modified polar ΣΔ architectures.
A frequency synthesizer generates a local frequency that
is mixed with the incoming RF signal to create a lower
frequency signal that can be digitized and processed in the
baseband IC. A frequency synthesizer has to provide all
necessary frequencies for the down-and upconversion with
proper channel spacing that corresponds to the channel
bandwidth or to the frequency raster. Frequency switching
has to be performed agilely, with respect to settling time
requirements of the standard. Moreover, the local frequency
synthesizer has to fulfil the tightest signal purity require-
ments that can be expressed in terms of the integrated phase
noise and the spurious output. These requirements given
by the Mobile WiMAX standard are summarized in Table 1
[12, 17].
It can be seen that the most critical requirements are
given in terms of the integrated phase noise and the settling
time. The integrated phase noise is to be less than 1
◦
rms
within an integration bandwidth of 1/20 of the tone spacing
(modulated carrier spacing) to 1/2 of the channel bandwidth
[17]. Thus for smaller channel bandwidths, the integration of
the phase noise can start from as low as a few hundred Hertz,
which results in worse phase jitter performance. Moreover,
the frequency synthesizer has to settle within less than 50 μs

The basic idea behind the switched loop bandwidth
topology is to use a larger loop bandwidth during the
frequency transition and, then, after a certain programmable
period, to shift the loop bandwidth to the normal narrow
value. To understand the switching principle, let us have
a look at the PLL control theory and the PLL linearized
model. The effect of a closed feedback loop on the input
reference signal ϕ
in
can be described by the closed loop
transfer function T(s)as
T
(
s
)
=
φ
out
(
s
)
φ
in
(
s
)
=
G
(
s

)
/s
1+K
d
K
vco
F
(
s
)
/Ns
. (9)
The transimpedance of the second-order loop filter depicted
in Figure 9 is given by
F
(
s
)
=
1+sC
2
R
2
s
(
C
1
+C
2
)(

K
vco
F
(
s
)
sN
=
I
cp
K
vco
F
(
s
)
2πsN
. (11)
By defining time constants T
2
and T
1
of zero and the pole
in the second order loop filter transfer function, respectively,
as T
2
= C
2
R
2

1+jω
c
T
2
1+jω
c
T
1
·
1
C
1
+ C
2
, (12)
and then, the open loop phase margin θ
c
reads
θ
c
[
rad
]
= π + arctan
(
ω
c
T
2
)

K
d
= I
cp
/2P
f
div
N/N + 1
K Dithering
0,
±I
cp
Switched LPF
F(s)
VCO
3.4
−3.88 GHz
K
vco
/s
Figure 8: Linear model of a fractional-N charge pump synthesizer.
−100
−50
0
50
100
Gain (dB)
−180
−135
−90

=
44.7
◦
).
Moreover, the product of all elements in (12)hastobe
increased by factor of α
2
as the angular frequency ω
c
in (12)is
in the power of two. This can be done by means of increasing
the charge pump current I
cp
by factor α
2
.
The speedup mode in our architecture is achieved when
the CP current is increased by a factor of 16 (I
cp
→ 16 · I
cp
)
while reducing the dumping resistance by factor of 4 (R
2
→
R
2
/4). Hence the PLL open-loop cross-zero frequency and
the zero and pole frequency (1/R
2

the wideband mode during the frequency transition. This
time period has been calculated by the reference counter
in terms of reference frequency cycles. One reference cycle
equals to 31.25 ns (1/32
· 10
6
). It has been found that the
major settling time improvement due to the speedup mode
occurs approximately within the first 425 reference cycles,
which corresponds to 13.3 μs. From this moment onward,
the settling time remains roughly constant, and hence it is
no more beneficial to stay in the wideband mode. This time
period has been considered as the optimal time to switch the
loop bandwidth to the normal value. Figure 10 shows the
EURASIP Journal on Wireless Communications and Networking 7
3.5
3.52
3.54
3.56
3.58
3.6
3.62
3.64
Frequency (GHz)
020406080
Time (μs)
Speed-up
enabled
(a)
100 m

rationsisdepictedinFigure11 along with corresponding
adjustment of loop filter parameters.
The integrated phase noise σ
rms
has been calculated from
488 Hz to 5 MHz. This integration bandwidth corresponds
−170
−160
−150
−140
−130
−120
−110
−100
−90
−80
Phase noise (dBc/Hz)
1 k 10 k 100 k 1M 10 M
Frequency (Hz)
Stable
Tr an si t
R
1
[Ω]
1100
275
I
cp
[mA]
0.313

Output specturm (dBm)
Figure 12: Signal spectrum of the modified polar ΣΔ architecture
( f
ΣΔ
= 3.7GHz).
to the channel bandwidth 10 MHz and FFT size 1024. It
is evident that the integrated phase noise has risen in the
transient mode due to the PLL bandwidth enlargement,
but on the other hand, the settling time has dropped
from 75.7 μs to 14.4 μs. Moreover, as the wideband mode
is employed only during the frequency transition, which
is very short, the higher phase noise does not affect the
performance of the synthesizer. This performance of the
frequency synthesizer has been considered during the co-
simulations of the modified polar ΣΔ architectures and
it has been observed that the overall performance of the
transmitter in terms of the EVM has not been deteriorated
(the EVM
= 1.4% in both cases).
5. Simulation Results of the Digital
Mixing Architecture
Figure 12 presents the output spectrum of the modified polar
ΣΔ architecture as described in the Section 2.1.
Figure 13 presents the output spectrum of the digital
mixing polar ΣΔ architecture described in the Section 2.2.
Simulation parameters are summarized in Sections 3 and 4.
8 EURASIP Journal on Wireless Communications and Networking
03691215
Frequency (GHz)
−140

11 /
4368
UMTS/
WCDMA
1920–1980 1950 60 5 16 / 195
UMTS
1900–1920 1910 20 / 5 47 / 191
2010–2025 2012.5 15 67 / 201
802.11 b/g 2400–2483.5 2441.75 83.5 11 14 / 110
802.11a 5150–5350 5250 200 20 13 / 131
Mobile
WiMAX
(802.16e)
2300–2400 2350 100 11 / 117
2496 – 2690 2593 194 6 / 129
3300 – 3400 3350 100 10 16 / 167
3400 – 3600 3500 200 8 / 175
3600 – 3800 3700 200 9 / 185
It can be seen that a single frequency component (that
was not present in the analog mixing ΣΔ architecture)
appears at 3f
c
(11.1 GHz, see Figure 13). The spectrum
replication, which is common in the digital mixing, can
lead to noise overlapping and may deteriorate the SNR
in the transmission bandwidth. Therefore, to assure the
overlapping-free transmission, the ΣΔ modulator frequency
has to be chosen according to (6)and(7). Unfortunately,
these conditions are not always easy to respect in a multi-
radio system, and there is always a tradeoff between the high

6. Conclusion
In this paper, we have presented a polar ΣΔ transmitter as a
suitable candidate for multi-radio applications, and, more-
over, we have proposed novel modifications and improve-
ments to this architecture. Viability of using the proposed
derivative architectures for multi-radio applications has been
studied and validated on the Mobile WiMAX standard. It
has been shown that proposed modifications can signif-
icantly decrease the overall circuit complexity compared
to the previously proposed polar architectures. The latter
modifications consider namely direct PLL modulation and
digital mixing when recombining the envelope signal with
the phase signal. Moreover, synchronization issues have
been addressed as well. We have demonstrated that certain
conditions related to the frequency of the ΣΔ modulator and
the signal bandwidth need to be fulfilled to assure accurate
operation and to maximize the SNR. It has also been shown
that to achieve high oversampling ratio, polar architectures
require high ΣΔ frequency. This has been demonstrated on
the Mobile WiMAX standard and theoretical values for the
maximum oversampling ratios for other communications
standards have been calculated as well.
To approach to more realistic analyses, we didn’t focus
only on the polar architecture itself, but we have also
investigated the impact of a real frequency synthesizer with
its inherent imperfections (such as phase noise and spurious
signals) on the performance of the overall architecture.
The proposed synthesizer employs switched loop bandwidth
topology, which allows operating in a wideband mode during
the frequency transition and hence achieves high switching

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