Systems Design and Programming Basic I/O III CMPE 310
1 (April 14, 2002)
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DB

8279
A
0
CS
BD
OUT A
3
OUT A
2
OUT A
1
OUT A
0
OUT B
3
OUT B
2
OUT B
1
OUT B
0
SL
0
SL
1
SL
2
SL
3
SHIFT

WR
RD
DB
1
DB
2
DB
3
DB
4
DB
5
Systems Design and Programming Basic I/O III CMPE 310
2 (April 14, 2002)
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Pinout Definition 8279
• A0: Selects data (0) or control/status (1) for reads and writes between
micro and 8279.
• BD: Output that blanks the displays.
• CLK: Used internally for timing. Max is 3 MHz.
• CN/ST: Control/strobe, connected to the control key on the keyboard.
•
CS: Chip select that enables programming, reading the keyboard, etc.
• DB
7
-DB
0
: Consists of bidirectional pins that connect to data bus on micro.
• IRQ: Interrupt request, becomes 1 when a key is pressed, data is available.
• OUT A
3
-A
0
/B
3
-B
0
: Outputs that sends data to the most significant/least
significant nibble of display.
O
FM
A
R
Y
L
A
N
DB
A
L
T
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M
O
R
EC
O
U

OB
0
SL
0
SL
1
SL
2
SL
3
SHIFT
CN/ST
RL
0
RL
1
DB
7
DB
6
RESET
RL
7
RL
6
RL
5
RL
4
IRQ

I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
16L8
O1
O2
O3
O4
O5
O6
O7
O8
A
1
A
2
A
3
A
4
A
5
A

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L
A
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9


1
SL
0
SHIFT
CN/ST
RL
0
RL
1
DB
7
DB
6
RESET
RL
7
RL
6
RL
5
RL
4
IRQ
CLK
RL
3
RL
2
DB
0

4
I
5
I
6
I
7
I
8
I
9
I
10
16L8
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
8

64 Key Matrix
(Normally open
74ALS138
switches)
Systems Design and Programming Basic I/O III CMPE 310
5 (April 14, 2002)
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A

Pins SL
2
-SL
0
sequentially scan each column through a counting operation.
The 74LS138 drives 0’s on one line at a time.
The 8279 scans RL pins synchronously with the scan.
RL pins incorporate internal pull-ups, no need for external resistor pull-
ups.
Unlike the 82C55, the 8279 must be programmed fi rst.
The fi rst 3 bits of # sent to control port selects one of 8 control words.
D
7
D
6
D
5
Function Purpose
0 0 0 Mode set Selects the number of display positions, type of key scan...
0 0 1 Clock Programs internal clk, sets scan and debounce times.
0 1 0 Read FIFO Selects type of FIFO read and address of the read.
0 1 1 Read Display Selects type of display read and address of the read.
1 0 0 Write Display Selects type of write and the address of the write.
1 0 1 Display write inhibit Allows half-bytes to be blanked.
1 1 0 Clear Clears the display or FIFO
1 1 1 End interrupt Clears the IRQ signal to the microprocessor.
Systems Design and Programming Basic I/O III CMPE 310
6 (April 14, 2002)
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Keyboard Interface of 8279
First three bits given below select one of 8 control registers (opcode).
000DDMMM
Mode set: Opcode 000.
DD sets displays mode.
MMM sets keyboard mode.
DD fi eld selects either:
8- or 16-digit display
Whether new data are entered to the rightmost or leftmost display posi-
tion.

A
N
DB
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Keyboard Interface of 8279