MINISTRY OF EDUCATION AND TRAINING
THAI NGUYEN UNIVERSITY
________________ CHU DUC TOAN

STUDY ADAPTIVE CONTROL ALGORITHMS WITH
REFERENCE FLOWS TO IMPROVE THE SPEED OF
SPECISLIZED PARALLEL PROCESSING SYSTEMS Major: Control Engineering and Automation
Code: 62.52.02.16 SUMMARY OF ENGINEERING THESIS
This thesis can be found in the library: Library of Industrial
Engineering University - Thai Nguyen University; Learning
materials Center of Thai Nguyen University, National Library of
Vietnam. 1

SUMMARY OF THESIS
1. The necessary of the topic
Many new areas such as computer graphics, artificial
intelligence, number analysis, parallel calculating in the petroleum
industry, the unmanned equipment, equipment of identifying
monitoring mobile targets , require to process very large volumes
of data with high speed. Most of this problem, the sequential
computer does not meet the actual requirements. Research on parallel
processing systems now focus two main researching directions are as
follows:
The one is to study multi-processor systems as supercomputers
(Suppercomputer) [45], [54], large computer (Mainframe),
minicomputer (minicomputer) make versatile: the hardware structure
and software function of the computer that must be multi-functional
organized are complex. Mathematical model is very complex,
beyond ordinary calculating structure. Therefore, when applied to

of this problem. The importance of SSS is the control set of reference
flow. On that basis, the problem to be solved is to synthetic the
structure of adaptive controlling of reference flow to SSS to
minimize the probability of conflicts when accessing shared
resources, improving computing speed is very important. From the
above analysis, the research poses the problem for parallel-
specialized multi-CPU processing system met the fast and reliable
processing speed, reasonable price is very necessary and as a basis to
form thesis’s topic: "Study adaptive control algorithms with
3

reference flows to improve the speed of specialized parallel
processing systems”
2. Object and scope of research
- Object of the thesis is SSS in parallel-specialized multi-CPU
processing system.
- The researching scope of the thesis is the limitation in making the
mathematical model in reference flow to SSS in parallel-specialized
multi-CPU processing system; specify the binding conditions
between these parameters and the changeable parameters to
synthesize optimal controlling system (adaptation) in reference flow
to SSS to improve the efficiency and reduce the probability of
conflicts when accessing shared resources.
3. The researching method of the thesis
- Based on the classic theory as a queuing theory, probability theory
namely Morkov process stops, distributes Poat-xông to build and
calculate the performance for reference mathematical model to SSS
in parallel Multi-CPU processing system.
- Describe mathematically model of shared memory in the parallel
multi-CPU processing system.

- Michel J.Flynn gave 4 architecture models of parallel processing
system are: (i) SISD model, (ii) SIMD model, (iii) MISD model, (iv)
MIMD model.
- Handler classifies parallel processing system based on parallel
level and processing level according to the pipeline mechanism of
the hardware structure.
1.4. Overall architecture of parallel multi-CPU processing
system
1.4.1. Model
1.4.2. The issues related to performance
1.5. The architecture of parallel- specialized multi-CPU
processing system.
1.5.1. The characteristics of parallel- specialized multi-CPU
processing system
a. Specialized function
Specialized function is also reflected in the data structure that the
system must process. This data structure is largely the vector data
due to the similar structure of elements and they are arranged in the
order (such as the structure: range-azimuth-height) that allows to
vector easily the basis of this data. The consequence is to perform
data processing operations as the pipeline mechanism easily - a
mechanism to improve the performance of processing system.
b. The structure of minimal hardware
6

Due to parallel- specialized processing system performs a defined
task and this task is established only in a math class so structural
parameters must be determined quite accurately. As a result, the
hardware organization will ensure minimal with standard partitioning
algorithm.

aircrafts are such as: (i) at different distances (ii) the speed is also
very different. The parameters must be monitored for an aircraft: (i)
distance (ii) azimuth and (iii) height, when the parameters are
controlled, we are able to draw the flying orbits. Then we can make
other decisions (to kill, not to kill ). 8


Surge generator

375 Hz
Pulse
reflection from
the target on
theother ranges
other
range
The cycle of pulse

U
9

In which, this topic shows clearly that it must solve at the same
time all the parameters such as, range, azimuth and height for 1024
range donuts. However, the topic did not mention to SSS.
- The situation of researching in the foreigner: The typical studies of
three authors from 2000 to now continue studying of parallel
processing system. The study was published in 2000 [5], Baghdadi
A., Zergainoh N. E. in 2004 [13], Chou Y., Fahs B., AND Abraham
S, also in 2004 with the work of the author: Ken Mai, Ron Ho, Elad
Alon, Dean Liu, Dinesh Patil, Mark Horowitz [39]. However, these
topics are applied for large multi-CPU system, supercomputers.
Therefore, these topics study un- limited number of CPU, maybe up
to thousands of CPU. So many tight binding parameters are not
specified, large survey graph drawing gets difficulties. In term of the
parallel- specialized multi-CPU processing system, the number of
CPU is not too much, functional disintegrate is very good.
1.7. Conclusion of Chapter 1

the system established after clocking the system. Moreover, there
used stopping Markov process only to confirm that the future state of
the system depends only on the current state of the system (which
does not depend on the previous states).
- Use the distribution of the reference to SSS of the parallel-
specialized multi-CPU processing system that is Poat-xong
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distribution: The parallel- specialized multi-CPU processing system
has good disintegrate in functions so the time for reference is much
less than the time for working in single-CPUs system of the system.
2.2. Building mathematical model referenced the shared memory
in parallel multi-CPU processing system.
2.2.1. The traditional reference model to the shared memory in
parallel multi-CPU processing system. 2.2.2. Building the improved reference model to the shared memory

unoccupied), even when you are Q =1- P . To refer successfully, we
need 1/E1 test with a conditional probability P (E1 – the performance
of entrance reference register is unoccupied).
The probability of occupied entrance reference registers is 1 - P to
ensure a successful reference, we need 1/Ep test (Ep – The
performance of busy entrance reference register). So we turn to the
problem of conditional probability, with a relationship:
EE
Q
E
P
N
N
placc
acc
111
0

The expression of performance is rewritten as follows:

lp
pl
QEPE
EE
E

 (2.1)
This is a mathematical model to determine the performance of
shared memory’s architecture with a buffering as role of queuing at
the entrance and exit of the physical memory module. To determine








m
n
n
i
in
in
i
m
n
i
in
nii
e
nNPP
0 0
1
0
!
1
11




performance when entrance reference register into unoccupied
memory), is calculated as follows: each flow reference will be in one
of three states: (i) Free state; (ii) Reference flow state implementing
will be successful; (iii) Reference flow state implementing will be
successful. Supposing there exists quantities: q - the probability that
a free reference flow initials a reference;  - the probability that a
free reference flow;  - the probability of reference flow made
successful reference;  - - the probability of reference flow made
unsuccessful reference;  - the probability to refer successfully. )1(2
)1(4)21(21
2
q
qqqqqq
E
l





(2.25)
2.3. Conclusion of Chapter 2
In Chapter 2, the thesis solved the following issues:
- Having built a mathematical model referring to SSS for parallel-
specialized multi-CPU processing system, binding parameters can be
calculated and controlled as the queue size m, b
15

Figure 3.4: The software interface performance calculating the
performance of the multi-CPU processing system in relation to to the
Tc shared memory’s cycle with values ρ = 0.5
3.2. Survey and evaluate the performance of controlling model
by simulation
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Using the software program has been built and surveyed the
performance of system according to the relationships established, we
have the correlation graph among them. The results are as follows:
Logic memory model consistent with the results from scalar
simulation to achieve the performance which is over 0.6. In
particular, when T = Tc = 16, the simulation result without queue (m
= 0) the result is 0.27; and the performance is 0.65 when using the
queue.
0
0.2
0.4
0.6
0.8
1
1 3 5 7 9 11 13 15 17 19 21
T
Mô hình Bailey (m=0)
m=2
E

Figure 3.5: Efficiency of random reference of logic memory
bandwidth according to T is compared in the two cases when m = 2
and without logic memory bandwidth (m = 0, Tl = Td = 0)

E
n

a) b)
Figure 3.7: E graph according to the number of reference flow n.
a) Tc = 10, b) Tc = 5
According to the survey‘s results, the more the performance
increased, the more the queue’s size increased. However, we can not
design the buffering with too big size, because after writing data only
a few cycles referenced may be asked to read data immediately. So if
the larger queue’s size is, the longer the waiting time for writing to
memory and other reference flows can misread data.
0.0
0.2
0.4
0.6
0.8
1.0
1 5 10 15 20 25 30 35 40 45 50
Tc
m=6
m=4
m=2
m=0

Figure 3.8: Egraph according to physical cycles of Tc memory
modules while keeping fixed ρ = 0.5
With a system composed n reference flows, l logical memory
bandwidths, T
l

Figure 3.10: Adaptive control block diagram for parallel processing
to a dedicated CPU
3.4. FPGA Technology
3.4.1. Reconstruction of architectural hardware program
3.4.2. System Design on FPGA
3.5. Diagram adaptive control theory in the parameter m
The simulation clearly shows the quantitative relation between the
performance E and queue’s size. However, E is dependent on the
density of the reference flow over time (due to parameter n is not a
constant) so we need a controlling mechanism the m size of the
Adaptive controller
Object

control

lp
pl
QEPE
EE
E



E
yc
E
out
∆e
m
-

011; step 2- code 111, step 3- code 111.

21
Figure 3.16: The model driver queue size m

Figure 3.2: Dashboard
Controlling signals for FPGA under 3bit binary code with
000 -> open-circuit 111-> do nothing
Input D2 Input D3
Input in next
pipe floor
Output D1 001 010 011

# 1
Triger D
# 1
D1

Q1

D2

Q2

Dn

Qn
FPGAb)
n =3
Control signals

to the

FPGA22

3.6. Conclusion of Chapter 3
Chapter 3 has solved the following problems:

that the more the queue m increases, the less E performance is and it
is dependent on the number of reference flow that means we can
increase the number of CPUs up to multi-processing systems to solve
the problem of large numbers such as problems with large databases
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but high designate coefficients. Using technical solution to resize
queues m by FPGA technology to suit every math class.
- Gather the results of the thesis is used as a supporting tool for
integrated design for parallel-specialized multi-CPU processing
system, to meet practical requirements. The technical solutions given
are feasible and the advanced technology allows to implement.
2. Recommendations
Stopped in the dissertation new model adaptive control system as a
parameter is the queue size m should be flexible and yet highly
flexible. So further research directions of the thesis is to integrate a
number of other parameters in adaptive control mechanisms such as
duty cycle of Tc memory, memory bandwidth numbers of KGNDC b